Project Settings
Project Name proj_1 Device Name usb3_plugin_impl: Lattice MachXO2 : LCMXO2_2000HC
Implementation Name usb3_plugin_impl Top Module usb3_plugin
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 1000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 143 143 0 - 00m:00s - 19.11.20
13:14
(premap)Complete 17 8 0 0m:00s 0m:00s 148MB 19.11.20
13:14
(fpga_mapper)Complete 31 25 0 0m:07s 0m:07s 202MB 19.11.20
13:14
Multi-srs Generator Complete00m:01s19.11.20
13:14

Area Summary
Register bits 400 I/O cells 49
Block RAMs (v_ram) 8 DSPs (dsp_used) 0
ORCA LUTs (total_luts) 762

Timing Summary
Clock NameReq FreqEst FreqSlack
clk_div_quater|plugin_clk_inferred_clock100.0 MHz155.1 MHz3.551
ft601_0__clk1__io100.0 MHzNANA
ft601_0__clk__io100.0 MHz88.8 MHz-1.259
jtag|jtag_clk_inferred_clock100.0 MHz65.8 MHz-5.199
pll|plugin_ddr_clk_inferred_clock100.0 MHz155.1 MHz3.551
plugin_stream_input_0__clk_word__p50.0 MHz156.6 MHz13.615
System100.0 MHz1760.6 MHz9.432